Rob McGuinness

Email:

jrmcguin <AT> cs <DOT> ucsd <DOT> edu

I’m a sixth-year PhD student working with George Porter. My academic interests include datacenter networking, traffic control, environmental computing, and ecological conservation.

I received B.S. and M.Eng. degrees in Computer Science at Cornell University.

My personal interests include hiking, boardgames, and tea! I also volunteer at the California Wolf Center, performing animal care.

Publications

Smartphones

Stipulated Smartphones for Students: The Requirements of Modern Technology for Academia

McGuinness, Rob, and Porter, George

Seventh Workshop on Computing within Limits 2021

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Technology has become pervasive in everyday life. College students are required to use internet-enabled computers and smartphones to access and interact with course material, often via browser software. However, the trend of requiring technology disadvantages lower income students. Additionally, the increased cycle of manufacturing, purchasing, and discarding devices comes with an environmental cost in the form of eWaste. Research has been done examining how long users can and do keep devices before discarding them, but we wish to understand this in the context of requirements for college students. In this paper, we examine how well online learning platforms function on older browser software and device hardware. We then perform an analysis over several years of data from a learning management system used at the authors’ university campus. We find that software and hardware become obsolete within roughly a four-year period, meaning students are likely to be required to purchase a new smartphone or laptop during their college careers. In reality, these “obsolete” devices are just as capable as they were when they were new. We advocate for a student-focused solution and examine possible future lines of research in this area.
Opera

Expanding across time to deliver bandwidth efficiency and low latency

Mellette, William M., Das, Rajdeep, Guo, Yibo, McGuinness, Rob, Snoeren, Alex C., and Porter, George

In 17th USENIX Symposium on Networked Systems Design and Implementation (NSDI 20) 2020

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Datacenters need networks that support both low-latency and high-bandwidth packet delivery to meet the stringent requirements of modern applications. We present Opera, a dynamic network that delivers latency-sensitive traffic quickly by relying on multi-hop forwarding in the same way as expander-graph-based approaches, but provides near-optimal bandwidth for bulk flows through direct forwarding over time-varying source-to-destination circuits. Unlike prior approaches, Opera requires no separate electrical network and no active circuit scheduling. The key to Opera's design is the rapid and deterministic reconfiguration of the network, piece-by-piece, such that at any moment in time the network implements an expander graph, yet, integrated across time, the network provides bandwidth-efficient single-hop paths between all racks. We show that Opera supports low-latency traffic with flow completion times comparable to cost-equivalent static topologies, while delivering up to 4x the bandwidth for all-to-all traffic and supporting up to 60% higher load for published datacenter workloads.
100-Gb/s TDMA

Evaluating the Performance of Software NICs for 100-Gb/s Datacenter Traffic Control

McGuinness, Rob, and Porter, George

In Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems 2018

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Modern-day datacenters are constantly evolving and scaling to serve more users. Network traffic and flow control is a critical component to enable this trend, and there is a significant amount of new research in this space. Researchers need a platform for quickly implementing and experimenting with new traffic control mechanisms, while keeping up with increasing line rates. We examine the feasibility of implementing new methods of traffic control in software NICs. We analyze their ability to implement traffic control mechanisms at 40- and 100-Gb/s. We find that while they offer a platform for rapid prototyping at 40-Gb/s, they cannot (yet) support 100-Gb/s.
RotorNet

RotorNet: A Scalable, Low-Complexity, Optical Datacenter Network

Mellette, William M., McGuinness, Rob, Roy, Arjun, Forencich, Alex, Papen, George, Snoeren, Alex C., and Porter, George

In Proceedings of the Conference of the ACM Special Interest Group on Data Communication 2017

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The ever-increasing bandwidth requirements of modern datacenters have led researchers to propose networks based upon optical circuit switches, but these proposals face significant deployment challenges. In particular, previous proposals dynamically configure circuit switches in response to changes in workload, requiring network-wide demand estimation, centralized circuit assignment, and tight time synchronization between various network elements--- resulting in a complex and unwieldy control plane. Moreover, limitations in the technologies underlying the individual circuit switches restrict both the rate at which they can be reconfigured and the scale of the network that can be constructed.We propose RotorNet, a circuit-based network design that addresses these two challenges. While RotorNet dynamically reconfigures its constituent circuit switches, it decouples switch configuration from traffic patterns, obviating the need for demand collection and admitting a fully decentralized control plane. At the physical layer, RotorNet relaxes the requirements on the underlying circuit switches---in particular by not requiring individual switches to implement a full crossbar---enabling them to scale to 1000s of ports. We show that RotorNet outperforms comparably priced Fat Tree topologies under a variety of workload conditions, including traces taken from two commercial datacenters. We also demonstrate a small-scale RotorNet operating in practice on an eight-node testbed.
TerraWatt

TerraWatt: Sustaining Sustainable Computing of Containers in Containers

Switzer, Jennifer, McGuinness, Rob, Pannuto, Pat, Porter, George, Schulman, Aaron, and Raghavan, Barath

CoRR 2021

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Each day the world inches closer to a climate catastrophe and a sustainability revolution. To avoid the former and achieve the latter we must transform our use of energy. Surprisingly, today's growing problem is that there is too much wind and solar power generation at the wrong times and in the wrong places. We argue for the construction of TerraWatt: a geographically-distributed, large-scale, zero-carbon compute infrastructure using renewable energy and older hardware. Delivering zero-carbon compute for general cloud workloads is challenging due to spatiotemporal power variability. We describe the systems challenges in using intermittent renewable power at scale to fuel such an older, decentralized compute infrastructure.
Dark Packets

Dark Packets and the End of Network Scaling

Thomas, Shelby, McGuinness, Rob, Voelker, Geoffrey M., and Porter, George

In Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems 2018

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Today 100GbE network interfaces are commercially available, with 400GbE proposals already in the standardization process. In this environment, a major bottleneck is DRAM latency, which has stagnated at 100ns per access. Beyond 100GbE, all packet sizes will arrive faster than main memory can accommodate, resulting packet drops due to the latency incurred by the memory hierarchy.We call these losses caused by the gap between cache and DRAM, Dark Packets. We observe that for link rates of 100GbE an application making a single memory access causes a high number of packet drops. Today, this problem can be overcome by increasing the physical core count (not scalable), increasing packet sizes (not generalizable), or by building specialized hardware (high cost).In this work, we measure the impact of the dark packet phenomenon and propose CacheBuilder, an API to carve out bespoke hardware caches from existing ones through simple user level APIs. CacheBuilder allows for explicit control over processor cache memory and cache-to-main memory copies by creating application-specific caches that result in higher overall performance and reduce dark packets. Our results show that for NFVs operating with small packet sizes at 40GbE we reduce dark packets from 35% to 0% and only require half the amount of cores to achieve line rates.